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Claruspon
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Claruspon Careers

1) Networking ASIC Engineer

Candidate Type: Contractor / Consultant
Job Category: Verilog RTL Design / Architecture
Working Location: 2880 Zanker Road, San Jose, CA 95134
Description: Work with a team consists of company founder and system
architect to define and/or design traffic management block to
interface to Ethernet backplane. Potentially work with Verilog
designer(s) to finish coding design.
Qualifications:
1. MS or BS with 7+ years of hands-on networking ASIC design
experience
2. Must have designed traffic management blocks in prior
project(s)
3. Hands-on design experience with Weighted Round-Robin
(WRR), Deficit Weighted Round-Robin (DWRR) and queuing
implementations.
4. Good functional spec. writing skill

2) SERDES Design Engineer

Candidate Type: Contractor / Consultant
Job Category: SERDES/Mixed Signal
Working Location: 2880 Zanker Road, San Jose, CA 95134
Description: Work with a team consists of company founder, optical network
architect and SERDES project lead (Stanford PhD) up to several
high-speed SERDES blocks. Do analog circuit design. Run
simulations.
Qualifications:
1. PhD and no experience or MSEE and three years of experience
in Electrical & Computer Engineering.
2. Strong analog circuit design background, with an emphasis in
high speed design (>1Ghz).
3. Exposure to relevant circuit blocks: PLL, CDR, SERDES,
equalizer, ADC, AGC.
4. Exposure/experienced in Cadence design environment.

3) PCB & Layout Engineer
4) Networking Software Engineer
5) Embedded Linux Driver Engineer

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